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| loginid=jiacheng_xia@sanstar-tech.com,time=2013-01-28 14:53:10,ip=218.17.158.23,doctitle=MT6323_technical brief_v0 1_20130110.pdf,company=sanstar_wcx version: 0.1 release date: 2013/1/10 ? 2013 mediatek inc. this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this inform ation in whole or in part is strictly prohibited. specifications are subject to change without notice. MT6323 pmic technical brief
o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 2 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited . document revision history revision date author description 0.1 2013/01/10 shangying chung initial o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 3 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. table of contents document revi sion hist ory ..................................................................................................... ............. 2 ? table of co ntents ............................................................................................................. ...................... 3 ? 1 ? overview ............................................................................................................................... ......... 4 ? 1.1 ? features ............................................................................................................................... . 4 ? 1.2 ? applications .................................................................................................................. ........ 4 ? 1.3 ? general descr iptions .......................................................................................................... .. 4 ? 1.4 ? ordering in formation .......................................................................................................... ... 5 ? 1.5 ? top marking definition .......................................................................................................... 5 ? 1.6 ? pin assignments and descriptions ....................................................................................... 6 ? 2 ? MT6323 packaging .............................................................................................................. ....... 12 ? 2.1 ? package dimens ions .......................................................................................................... 1 2 ? appendix ...................................................................................................................... ......................... 14 ? lists of figures figure 1-1. MT6323 vfbga - 145l (5 .8x5.8mm) pin assignment .......................................................... 6 ? lists of tables table 1-1. MT6323 pi n descriptions ............................................................................................ ............ 6 ? o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 4 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 1 overview 1.1 features ? handles all 2g/3g/smart phone baseband power management ? input range: 3.4 ~ 4.5v ? 3 buck converters and 23 ldos optimized for specific 2g/3g/smart phone subsystems ? full-set high-quality audio feature: supports uplink/downlink audio codec and high-power/quality audio amplifier ? 32k rtc crystal oscillator for system timing, 1.8 and 2.8v clock buffer output ? multiple function gpio ? flexibility for variou s configurations of indicator led current source: 4isink ? spi interface ? li-ion battery charging function ? over-current and thermal overload protection ? programmable under voltage lockout protection ? watchdog timer ? flexibility hardware pm ic reset function ? power-on reset and start-up timer ? precision voltage, temperature, and current measurement fuel gauge ? vfbga - 145l package 1.2 applications ideal for power management of 2g, 3g, smart phones and other portable systems. 1.3 general descriptions MT6323 is a power management system chip optimized for 2g/3g handsets and smart phones, especially based on the mediatek mt6572 system solution. MT6323 contains 3 buck converters and 23 ldos, which are optimized for specific 2g/3g/smart phone subsystems. MT6323 provides mono 0.7w into 8 ? , high efficiency class ab/d audio amplifiers and flexibility for various app lications of indicator led drivers. it supports up to 4 channel leds with independent controlled. flexible control includes: register mode, pwm mode and breath mode. sophisticated controls are available for power- up, battery charging and the rtc alarm. MT6323 is optimized for maximum battery life. it allows the rtc circuit to stay alive without a battery for several hours. the battery charger in MT6323 supports lithium - ion (li-ion) battery and provides pre-charge indication. the charger input voltage can be up to 10v and allows usb charging, too. some multi-purpose pins enable MT6323 to be configured in various applications. MT6323 adopts spi interface and srclken control pin to control buck converters, ldos, class ab/d, various drivers and charger. besides, it provides enhanced safety control and protocol for handshaking with bb. MT6323 is available in a vfbga - 145l package. the operating temperature ranges from -25 to +85c. o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 5 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. 1.4 ordering information order # marking temp. range package MT6323a/a -25 ~ +85c vfbga - 145l 1.5 top marking definition MT6323a/a dddd: date code $$$$$$$: random code o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 6 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. 1.6 pin assignments and descriptions figure 1-1. MT6323 vfbga - 145l (5.8x5.8mm) pin assignment table 1-1. MT6323 pin descriptions ball symbol i/o description a1 sysrstb i watchdog reset from ap a10 chg_dm i usb d- for bc1.1 standard a11 chg_dp i usb d+ for bc1.1 standard o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 7 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. ball symbol i/o description a12 vcdt i fractional charger input voltage for charger detection a13 vbat_vpa pwr battery power supply input of vpa a14 vpa o sw node of vpa a2 srclken i 26mhz clk enable a3 xin i 1. one of 32k crystal connection port while using crystal to generate 32khz clock 2. tie to ground with 32khz crystal absence a4 xout i 1. one of 32k crystal connection port while using crystal to generate 32khz clock 2. external 32khz clock input with 32khz crystal absence a5 dvdd18_io pwr power of vio18 io/core a7 int o default: output 0 interrupt to bb, high active a8 dvdd18_dig pwr power of vdig18 a9 fsource pwr efuse power source b1 auxadc_auxin_gps i auxadc input b10 gnd_isink gnd gnd for isink b12 vproc_fb i feedback of vproc b14 vpa o sw node of vpa b2 avss28_auxadc gnd gnd for auxadc b5 sim1_ap_sclk i ap/pmic sim1 clock b6 aud_miso o uplink audio adc serial data b7 spi_csn i spi interface's chip select signal to identify which device is selected b8 spi_miso io spi interface's serial data signal. default is output only. c10 isink3 o current sink channel 3 output c12 gnd_vproc_fb i remote sense on ground of vproc c14 vproc o sw node of vproc c2 auxadc_vref18 o 1.8v auxadc reference output c3 avdd33_rtc pwr rtc ldo output. supply of rtc macro where backup battery can be added. c4 rtc_32k2v8 o rtc domain 32khz clock output c5 sim2_ap_sclk i ap/pmic sim2 clock c9 isink1 o current sink channel 1 output d1 au_vin2_n i analog input 3 negative d12 vpa_fb i feedback of vpa d14 vproc o sw node of vproc d2 au_vin2_p i analog input 3 positive o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 8 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. ball symbol i/o description d3 avdd28_auxadc pwr 2.8v power input for auxadc d5 rtc_32k1v8 o vio18 domain 32khz clock output d6 sim2_ap_srst i ap/pmic sim2 srst d8 spi_mosi io spi interface's serial data signal. default is input only. d9 spi_clk i spi interface's clock e1 clk26m i 26mhz clk e10 isink2 o current sink channel 2 output e11 gnd_vproc gnd ground of vproc e13 gnd_vpa gnd ground of vpa e14 vproc o sw node of vproc e2 accdet i accessory detection input e4 au_vin0_p i analog input 1 positive e6 sim1_ap_srst i ap/pmic sim1 srst e7 aud_mosi i downlink dac serial data e8 aud_clk i 26m clock (can be hopping) e9 isink0 o current sink channel 0 output f10 gnd_vproc gnd ground of vproc f11 gnd_vproc gnd ground of vproc f13 vbat_vproc pwr battery power supply input of vproc f14 vbat_vproc pwr battery power supply input of vproc f2 au_micbias0 pwr microphone bias for main and 2 nd microphone f4 au_vin0_n i analog input 1 negative f5 gnd_ldo gnd ground for ldo f6 gnd_ldo gnd ground for ldo f7 gnd_ldo gnd ground for ldo f8 gnd_ldo gnd ground for ldo f9 gnd_ldo gnd ground for ldo g1 au_hsn o receiver output g11 gnd_vsys gnd ground of vsys buck g13 vbat_vproc pwr battery power supply input of vproc g2 au_micbias1 pwr microphone vias for earphone g3 au_vin1_p i analog input 2 positive g4 au_vin1_n i analog input 2 negative g5 gnd_ldo gnd ground for ldo g6 gnd_ldo gnd ground for ldo g7 gnd_ldo gnd ground for ldo g8 gnd_ldo gnd ground for ldo o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 9 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. ball symbol i/o description g9 gnd_ldo gnd ground for ldo h1 au_hsp o receiver output h10 gnd_ldo gnd ground for ldo h11 vrf18 o vrf18 output voltage h13 vbat_vsys pwr battery power supply input of vsys buck h14 vsys o sw node of vsys buck h2 gnd_abb gnd gnd of abb h4 au_hpl o headphone l-ch output h5 gnd_ldo gnd ground for ldo h6 gnd_ldo gnd ground for ldo h7 gnd_ldo gnd ground for ldo h8 gnd_ldo gnd ground for ldo h9 gnd_ldo gnd ground for ldo j10 gnd_ldo gnd ground for ldo j12 vcn18 o vcn18 output voltage j13 vm o vm output voltage j14 avdd22_buck pwr power supply input of vsysldo j2 avdd28_abb pwr 2.8v power input for abb j4 au_hpr o headphone r-ch output j6 gnd_ldo gnd ground for ldo j7 gnd_ldo gnd ground for ldo j8 gnd_ldo gnd ground for ldo j9 gnd_ldo gnd ground for ldo k1 spk_p o positive output for internal speaker amp k10 simls2_srst o simls2 srst k11 simls2_ap_sio io sim2_ap data signal k14 vcamd o vcamd output voltage k3 baton i battery ntc pin for battery and its temperature sensing k4 resetb o system reset release signal k6 gnd_ldo gnd ground for ldo k8 gnd_ldo gnd ground for ldo k9 simls2_sclk o simls2 sclk l1 spk_n o negative output for internal speaker amp l11 simls2_sio io simls2 data signal l12 vio18 o vio18 output voltage l13 vcam_io o vcam_io output voltage l14 vgp3 o vgp3 output voltage o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 10 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. ball symbol i/o description l2 gnd_spk gnd ground for vbat_spk l4 vtcxo o vtldo output voltage l6 vmc o vmc output voltage l8 vgp1 o vgp1 output voltage m1 fchr_enb i force charging enb m10 simls1_srst o simls1 srst m11 simls1_ap_sio io sim1_ap data signal m13 vdrv o charger current drive output m14 avdd22_buck pwr power supply input of vsysldo m2 pwrkey i power key signal m3 va o va output voltage m4 vio28 o vio28 output voltage m6 vcn33 o vcn33 output voltage m7 vibr o vibr output voltage m9 simls1_sclk o simls1 sclk n11 simls1_sio io simls1 data signal n12 ext_pmic_en o external pmic enable (vbat domain) n13 chrldo o charger ldo28 output n14 gnd_vref gnd ground for bandgap n2 pmu_testmode i pmu testmode signal (tied to gnd in normal operation) n3 vcn28 o vcn28 output voltage n6 vusb o vsub output voltage n7 vcam_af o vcam_af output voltage n8 vgp2 o vgp2 output voltage n9 vsim2 o vsim2 output voltage p1 vbat_spk pwr battery power supply input of spk p12 isense i positive terminal for battery's charging current sensing resistor p13 batsns i negative terminal for battery's charging current sensing resistor p14 vref o bandgap reference voltage p2 vbat_ldos1 pwr ldo1 vbat power p3 vcama o vcama output voltage p4 vmch o vmch output voltage p5 vbat_ldos2 pwr ldo2 vbat power p6 vbat_ldos3 pwr ldo3 vbat power p7 vemc_3v3 o vemc_3v3 output voltage o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 11 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. ball symbol i/o description p8 vbat_ldos3 pwr ldo3 vbat power p9 vsim1 o vsim1 output voltage o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 12 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. 2 MT6323 packaging 2.1 package dimensions o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 13 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. o r j l q l g m l d f k h q j b [ l d # v d q v w d u w h f k f r p w l p h l s g r f w l w o h 0 7 b 7 h f k q l f d o % u l h i b 9 b s g i f r p s d q \ 6 d q v w d u b : & ; MT6323 pmic technical brief confidential a mediatek confidential ? 2013 mediatek inc. page 14 of 14 this document contains information th at is proprietary to mediatek inc. unauthorized reproduction or di sclosure of this information in whol e or in part is strictly prohibited. appendix n/a |
Price & Availability of MT6323
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